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LT1366/LT1367 LT1368/LT1369 Dual and Quad Precision Rail-to-Rail Input and Output Op Amps
FEATURES
s s s s s s s s s s s s
DESCRIPTION
The LT (R)1366/LT1367/LT1368/LT1369 are dual and quad bipolar op amps which combine rail-to-rail input and output operation with precision specifications. These op amps maintain their characteristics over a supply range of 1.8V to 36V. Operation is specified for 3V, 5V and 15V supplies. Input offset voltage is typically 150V, with an open-loop gain AVOL of 1 million while driving a 10k load. Common mode rejection is typically 90dB over the full railto-rail input range, and supply rejection is 110dB. The LT1366/LT1367 have conventional compensation which assures stability for capacitive loads of 1000pF or less. The LT1368/LT1369 have compensation that requires a 0.1F output capacitor, which improves the amplifier's supply rejection and reduces output impedance at high frequencies. The output capacitor's filtering action reduces high frequency noise, which is beneficial when driving A/D converters. The LT1366/LT1368 are available in plastic 8-pin PDIP and 8-lead SO packages with the standard dual op amp pinout. The LT1367/LT1369 feature the standard quad pinout, which is available in a plastic 14-lead SO package. These devices can be used as plug-in replacements for many standard op amps to improve input/output range and precision.
Input Common Mode Range Includes Both Rails Output Swings Rail-to-Rail Low Input Offset Voltage: 150V High Common Mode Rejection Ratio: 90dB High AVOL: >1V/V Driving 10k Load Low Input Bias Current: 10nA Wide Supply Range: 1.8V to 15V Low Supply Current: 375A per Amplifier High Output Drive: 30mA 400kHz Gain-Bandwidth Product Slew Rate: 0.13V/s Stable for Capacitive Loads up to 1000pF
APPLICATIONS
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Rail-to-Rail Buffer Amplifiers Low Voltage Signal Processing Supply Current Sensing at Either Rail Driving A/D Converters
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
Positive Supply Rail Current Sense
VCC R1 200
Output Saturation Voltage vs Load Current
1000
SATURATION VOLTAGE (mV) VOUT - VS
100
Rs 0.2
-
1/2 LT1366
-
Q1 TP0610L 1/2 LT1366
+
ILOAD LOAD R2 20k
+
R2 VO = ILOAD * RS R1 = ILOAD * 20
()
10
1366 TA01
1 0.001
U
U
U
POSITIVE RAIL NEGATIVE RAIL
0.01 0.1 1 LOAD CURRENT (mA)
10
1366 TA02
1
LT1366/LT1367 LT1368/LT1369
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V + to V - ) ............................. 36V Input Current ..................................................... 15mA Output Short-Circuit Duration (Note 1) ........ Continuous Operating Temperature Range .............. -40C to 85C Junction Temperature.......................................... 150C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
PACKAGE/ORDER INFORMATION
TOP VIEW OUT A 1 - IN A 2 A +IN A 3 V
-
ORDER PART NUMBER
8 V+ 7 OUT B
B
6 - IN B 5 +IN B
4 N8 PACKAGE 8-LEAD PDIP
LT1366CN8 LT1366CS8 LT1368CN8 LT1368CS8 S8 PART MARKING 1366 1368
S8 PACKAGE 8-LEAD PLASTIC SO
TJMAX = 150C, JA = 130C/ W (N8) TJMAX = 150C, JA = 190C/ W (S8)
AVAILABLE OPTIO S
PRODUCT NUMBER LT1366 LT1367 LT1368 LT1369 NUMBER OF OP AMPS 2 4 2 4 LOAD CAPACITANCE OpF < CL < 1000pF OpF < CL < 1000pF CL = 0.1F CL = 0.1F MAX VOS (25C) AT VS = 5V, 0V 475V 800V 475V 800V LT1368CN8 ORDER PART NUMBER PLASTIC (N) LT1366CN8 SURFACE MOUNT(S) LT1366CS8 LT1367CS LT1368CS8 LT1369CS
ELECTRICAL CHARACTERISTICS
TA = 25C, VS = 5V, 0V, VCM = 2.5V, VO = 2.5V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) IB IB Input Bias Current Input Bias Current Shift CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VCC VCM = VEE VCM = VEE to VCC 0 -35 MIN TYP 150 150 150 150 150 250 150 250 10 -10 20 MAX 475 475 800 700 400 700 650 1600 35 0 70 UNITS V V V V V V V V nA nA nA
2
U
U
W
WW U
U
W
TOP VIEW OUT A 1 -IN A 2 +IN A 3 V+ 4 +IN B 5 -IN B 6 OUT B 7 B C A D 14 OUT D 13 - IN D 12 +IN D 11 V - 10 +IN C 9 - IN C 8 OUT C
ORDER PART NUMBER LT1367CS LT1369CS
S PACKAGE 14-LEAD PLASTIC SO
TJMAX = 150C, JA = 150C/ W
LT1366/LT1367 LT1368/LT1369
ELECTRICAL CHARACTERISTICS
TA = 25C, VS = 5V, 0V, VCM = 2.5V, VO = 2.5V, unless otherwise noted.
SYMBOL PARAMETER IOS IOS Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) en in CIN A VOL CMRR Input Noise Voltage Density Input Noise Current Density Input Capacitance Large-Signal Voltage Gain Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) Common Mode Rejection Ratio (LT1367/LT1369) CMRR Match (Channel to Channel) PSRR V OL Power Supply Rejection Ratio PSRR Match (Channel to Channel) (Note 3) Output Voltage Swing LOW VO = 50mV to 4.8V, RL = 10k VCM = VEE to VCC VCM = VEE to VCC (Note 3) VCM = VEE to VCC VCM = VEE to VCC (Note 3) VS = 2.0V to 12V, VCM = VO = 0.5V VS = 2.0V to 12V, VCM = VO = 0.5V No Load ISINK = 0.5mA ISINK = 2.5mA No Load ISOURCE = 0.5mA ISOURCE = 2.5mA (Note 1) AV = 1000 AV = 1000 AV = 1, VSTEP = 4V to 0.1% 250 81 75 77 71 90 84 CONDITIONS VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3) f = 1kHz f = 1kHz 0 0 MIN TYP 1 0.3 1 1 1 29 0.07 12 2000 90 90 90 90 105 100 6 40 110 VCC - 0.012 VCC - 0.004 VCC - 0.100 VCC - 0.050 VCC - 0.250 VCC - 0.150 15 30 340 0.4 0.16 30 520 12 70 200 MAX 12 12 12 12 12 UNITS nA nA nA nA nA nV/Hz pA/Hz pF V/mV dB dB dB dB dB dB mV mV mV V V V mA A MHz MHz s
V OH
Output Voltage Swing HIGH
ISC IS GBW tS
Short-Circuit Current Supply Current per Amplifier Gain-Bandwidth Product (LT1366/LT1367) Gain-Bandwidth Product (LT1368/LT1369) Settling Time (LT1366/LT1367)
0C < TA < 70C, VS = 5V, 0V, VCM = 2.5V, VO = 2.5V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS TC VOS Input Offset Voltage Drift Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) IB IB IOS IOS Input Bias Current Input Bias Current Shift Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE (Note 2) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3)
q q q q q q q q q q q q q q q q q
MIN
TYP 200 200 200 200 2 200 250 200 250
MAX 575 575 950 900 6 425 900 675 1900 45 0 90 15 15 15 15 15
UNITS V V V V V/C V V V V nA nA nA nA nA nA nA nA
0 -45
15 -10 25 2 1 2
0 0
2 1
3
LT1366/LT1367 LT1368/LT1369
ELECTRICAL CHARACTERISTICS
0C < TA < 70C, VS = 5V, 0V, VCM = 2.5V, VO = 2.5V, unless otherwise noted.
SYMBOL PARAMETER AVOL CMRR Large-Signal Voltage Gain Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) Common Mode Rejection Ratio (LT1367/LT1369) CMRR Match (Channel to Channel) PSRR VOL Power Supply Rejection Ratio PSRR Match (Channel to Channel) (Note 3) Output Voltage Swing LOW CONDITIONS VO = 50mV to 4.8V, RL = 10k VCM = VEE to VCC VCM = VEE to VCC (Note 3) VCM = VEE to VCC VCM = VEE to VCC (Note 3) VS = 2.3V to 12V, VCM = VO = 0.5V VS = 2.3V to 12V, VCM = VO = 0.5V No Load ISINK = 0.5mA ISINK = 2.5mA No Load ISOURCE = 0.5mA ISOURCE = 2.5mA (Note 1)
q q q q q q q q q q
MIN 250 80 74 77 71 88 82
TYP 2000 87 87 87 87 105 100 9 45 120
MAX
UNITS V/mV dB dB dB dB dB dB
14 80 230
mV mV mV V V V mA
VOH
Output Voltage Swing HIGH
q VCC - 0.014 VCC - 0.005 q VCC - 0.110 VCC - 0.055 q VCC - 0.300 VCC - 0.180 q q
ISC IS
Short-Circuit Current Supply Current per Amplifier
12.5 385 540
A
TA = 25C, VS = 3V, 0V, VCM = 1.5V, VO = 1.5V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) IB IB IOS IOS Input Bias Current Input Bias Current Shift Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) AVOL CMRR Large-Signal Voltage Gain Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) Common Mode Rejection Ratio (LT1367/LT1369) CMRR Match (Channel to Channel) VOL Output Voltage Swing LOW CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3) VO = 50mV to 2.8V, RL = 10k VCM = VEE to VCC VCM = VEE to VCC (Note 3) VCM = VEE to VCC VCM = VEE to VCC (Note 3) No Load ISINK = 0.5mA ISINK = 2.5mA No Load ISOURCE = 0.5mA ISOURCE = 2.5mA (Note 1) 0 0 250 77 71 73 67 0 - 35 MIN TYP 150 150 150 150 150 250 150 250 10 -10 20 1.0 0.3 1 1 1 1500 86 86 86 86 6 40 110 VCC - 0.012 VCC - 0.004 VCC - 0.100 VCC - 0.050 VCC - 0.250 VCC - 0.150 10 20 330 500 12 70 200 MAX 475 475 850 750 400 700 650 1700 35 0 70 12 12 12 12 12 UNITS V V V V V V V V nA nA nA nA nA nA nA nA V/mV dB dB dB dB mV mV mV V V V mA A
VOH
Output Voltage Swing HIGH
ISC IS
Short-Circuit Current Supply Current per Amplifier
4
LT1366/LT1367 LT1368/LT1369
ELECTRICAL CHARACTERISTICS
0C < TA < 70C, VS = 3V, 0V, VCM = 1.5V, VO = 1.5V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) VOS TC IB IB IOS IOS Input Offset Voltage Drift Input Bias Current Input Bias Current Shift Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) A VOL CMRR Large-Signal Voltage Gain Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) (Note 2) VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3) VO = 50mV to 2.8V, RL = 10k VCM = VEE to VCC VCM = VEE to VCC (Note 3)
q q q q q q q q q q q q q q q q q q q q q q q q q
MIN
TYP 200 200 200 200 200 250 200 250 2
MAX 575 575 950 900 425 900 675 1900 6 45 0 90 15 15 15 15 15
UNITS V V V V V V V V V/C nA nA nA nA nA nA nA nA V/mV dB dB dB dB
0 -45
15 -10 25 2 1 2
0 0 150 76 70 72 66
2 1 1500 83 83 83 83 9 45 120
V OL
Common Mode Rejection Ratio (LT1367 /LT1369) VCM = VEE to VCC CMRR Match (Channel to Channel) VCM = VEE to VCC (Note 3) Output Voltage Swing LOW No Load ISINK = 0.5mA ISINK = 2.5mA Output Voltage Swing HIGH No Load ISOURCE = 0.5mA ISOURCE = 2.5mA (Note 1)
14 80 230
mV mV mV V V V mA
V OH
q VCC - 0.014 VCC - 0.005 q VCC - 0.110 VCC - 0.055 q VCC - 0.300 VCC - 0.180 q q
ISC IS
Short-Circuit Current Supply Current per Amplifier
10 375 520
A
5
LT1366/LT1367 LT1368/LT1369
ELECTRICAL CHARACTERISTICS
TA = 25C, VS = 15V, VCM = 0V, VO = 0V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) IB IB IOS IOS Input Bias Current Input Bias Current Shift Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) CIN AVOL Input Capacitance Large-Signal Voltage Gain Channel Separation SR Slew Rate (LT1366/LT1367) Slew Rate (LT1368/LT1369) CMRR Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) Common Mode Rejection Ratio (LT1367/LT1369) CMRR Match (Channel to Channel) PSRR VOL Power Supply Rejection Ratio PSRR Match (Channel to Channel) Output Voltage Swing LOW VO = -14.7V to 14.7V, RL = 10k VO = -10V to 10V, RL = 2k VO = -10V to 10V, RL = 2k AV = -1, RL = Open, VO = 10V, Measured at VO = 5V AV = -1, RL = Open, VO = 10V, Measured at VO = 5V VCM = VEE to VCC VCM = VEE to VCC (Note 3) VCM = VEE to VCC VCM = VEE to VCC (Note 3) VS = 5V to 15V VS = 5V to 15V (Note 3) No Load ISINK = 0.5mA ISINK = 10mA No Load ISOURCE = 0.5mA ISOURCE = 10mA (Note 1) 95 89 93 87 90 84 1000 500 120 CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3) 0 0 0 - 35 MIN TYP 200 200 200 200 150 300 150 300 10 -10 20 1.0 0.3 1 1 1 7.1 10000 10000 135 0.13 0.065 106 106 106 106 110 105 VEE + 0.006 VEE + 0.012 VEE + 0.040 VEE + 0.070 VEE + 0.240 VEE + 0.500 VCC - 0.012 VCC - 0.004 VCC - 0.100 VCC - 0.050 VCC - 0.800 VCC - 0.400 30 75 370 550 MAX 700 700 1000 900 500 1300 650 2000 35 0 70 12 12 12 12 12 UNITS V V V V V V V V nA nA nA nA nA nA nA nA pF V/mV V/mV dB V/s V/s dB dB dB dB dB dB V V V V V V mA A
VOH
Output Voltage Swing HIGH
ISC IS
Short-Circuit Current Supply Current per Amplifier
6
LT1366/LT1367 LT1368/LT1369
ELECTRICAL CHARACTERISTICS
0C < TA < 70C, VS = 15V, VCM = 0V, VO = 0V, unless otherwise noted.
SYMBOL PARAMETER VOS Input Offset Voltage (LT1366/LT1368) Input Offset Voltage (LT1367/LT1369) VOS Input Offset Voltage Shift (LT1366/LT1368) Input Offset Voltage Match (Channel to Channel) Input Offset Voltage Shift (LT1367/LT1369) Input Offset Voltage Match (Channel to Channel) VOS TC IB IB IOS IOS Input Offset Voltage Drift Input Bias Current Input Bias Current Shift Input Offset Current Input Offset Current Shift Input Bias Current Match (Channel to Channel) A VOL Large-Signal Voltage Gain Channel Separation CMRR Common Mode Rejection Ratio (LT1366/LT1368) CMRR Match (Channel to Channel) Common Mode Rejection Ratio (LT1367/LT1369) CMRR Match (Channel to Channel) PSRR V OL Power Supply Rejection Ratio PSRR Match (Channel to Channel) Output Voltage Swing LOW CONDITIONS VCM = VCC VCM = VEE VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) VCM = VEE to VCC VCM = VEE, VCC (Notes 3, 4) (Note 2) VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC VCM = VEE VCM = VEE to VCC VCM = VCC (Note 3) VCM = VEE (Note 3) VO = - 14.7V to 14.7V, RL = 10k VO = - 10V to 10V, RL = 2k VO = - 10V to 10V, RL = 2k VCM = VEE to VCC VCM = VEE to VCC (Note 3) VCM = VEE to VCC VCM = VEE to VCC (Note 3) VS = 5V to 15V VS = 5V to 15V (Note 3) No Load ISINK = 0.5mA ISINK = 10mA No Load ISOURCE = 0.5mA ISOURCE = 10mA (Note 1)
q q q q q q q q q q q q q q q q q q q q q q q q q q q q q
MIN
TYP 250 250 250 250 200 300 200 300 2
MAX 850 850 1150 1000 525 1500 750 2300 8 45 0 90 15 15 15 15 15
UNITS V V V V V V V V V/C nA nA nA nA nA nA nA nA V/mV V/mV dB dB dB dB dB dB dB V V V V V V mA
0 -45
15 -10 25 2 1 2
0 0 750 500 110 95 89 92 86 80 75
2 1 6000 6000 135 103 103 103 103 105 100
VEE + 0.009 VEE + 0.014 VEE + 0.045 VEE + 0.080 VEE + 0.300 VEE + 0.600
V OH
Output Voltage Swing HIGH
q VCC - 0.014 VCC - 0.005 q VCC - 0.11 VCC - 0.055 q VCC - 0.95 VCC - 0.500 q q
ISC IS
Short-Circuit Current Supply Current per Amplifier
30 415 575
A
The q denotes specifications that apply over the full operating temperature range. Note 1: Applies to short circuits to ground for all split supplies and for single supplies less than 20V. Short circuits to either supply for supplies greater than 20V total may permanently damage the part. A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely.
Note 2: This parameter is not 100% tested. Note 3: Matching parameters are the difference between amplifiers A and D and between B and C on the LT1367/LT1369; between the two amplifiers on the LT1366/LT1368. Note 4: Input offset voltage match is the difference in offset voltage between amplifiers measured at both VCM = VEE and VCM = VCC.
7
LT1366/LT1367 LT1368/LT1369
TYPICAL PERFORMANCE CHARACTERISTICS
(The data presented here applies to the LT1366/LT1367/LT1368/LT1369 unless otherwise noted.) PNP Stage VOS Distribution (LT1366/LT1368)
30 25 N-PACKAGE VS = 5V, 0V VCM = 0V 30 25 N-PACKAGE VS = 5V, 0V VCM = 5V
PERCENT OF UNITS (%)
PERCENT OF UNITS (%)
20 15 10 5 0 -350 -250 -150 - 50 50 150 250 INPUT OFFSET VOLTAGE (V)
PERCENT OF UNITS (%)
Supply Current vs Temperature
500
SUPPLY CURRENT PER AMPLIFIER (A)
SUPPLY CURRENT PER AMPLIFIER (A)
INPUT BIAS CURRENT (nA)
400
VS = 15V VS = 5V, 0V
300
200
100
0 -50 -35 -20 - 5 10 25 40 55 70 85 100 TEMPERATURE (C)
LT1366 TPC04
Input Bias Current vs Temperature
50 40
SATURATION VOLTAGE (mV)
20 10 0 - 10 - 20 - 30 - 40
VS = 5V, 0V, VCM = 5V VS = 15V, VCM = 15V VS = 5V, 0V, VCM = 0V VS = 15V, VCM = -15V
100 TA = 85C
SATURATION VOLTAGE (mV)
INPUT BIAS CURRENT (nA)
30
- 50 -50 -35 -20 - 5 10 25 40 55 70 85 100 TEMPERATURE (C)
LT1366 TPC07
8
UW
LT1366 TPC03
NPN Stage VOS Distribution (LT1366/LT1368)
30 25 20 15 10 5
VOS-Shift Between PNP and NPN Stages (LT1366/LT1368)
N-PACKAGE VS = 5V, 0V VCM = 0V TO 5V
20 15 10 5 0 -350 -250 -150 - 50 50 150 250 INPUT OFFSET VOLTAGE (V)
350
350
0 -350 -250 -150 - 50 50 150 250 INPUT OFFSET VOLTAGE (V)
350
LT1366 TPC02
LT1366 TPC01
Supply Current vs Supply Voltage
600 500 400 300 TA = -55C 200 100 0 0 4 8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V) 36
Input Bias Current vs Common Mode Voltage
20 15 VS = 5V, 0V TA = -55C TA = 25C
TA = 125C TA = 25C
10 5 0 -5 -10 -15 -20 -2 -1
TA = 125C
0 4 3 5 2 1 COMMON MODE VOLTAGE (V)
6
LT1366 TPC05
LT1366 TPC06
Output Saturation Voltage vs Load Current (Output HIGH)
1000 1000
Output Saturation Voltage vs Load Current (Output LOW)
100 TA = 85C TA = 25C 10 TA = - 55C
10
TA = 25C TA = -55C
1 0.001
0.01 0.1 1 LOAD CURRENT (mA)
10
LT1366 TPC08
1 0.001
0.01 0.1 1 LOAD CURRENT (mA)
10
LT1366 TPC09
LT1366/LT1367 LT1368/LT1369
TYPICAL PERFORMANCE CHARACTERISTICS
(The data presented here applies to the LT1366/LT1367/LT1368/LT1369 unless otherwise noted.) 0.1Hz to 10Hz Output Voltage Noise
70
OUTPUT VOLTAGE (200nV/DIV)
Minimum Supply Voltage
200 CHANGE IN OFFSET VOLTAGE (V)
150 100
NOISE VOLTAGE nV/Hz
TA = 70C TA = 85C
50
TA = 25C
0 NONFUNCTIONAL 1
TA = - 55C
3 2 4 TOTAL SUPPLY VOLTAGE (V)
Noise Current Spectrum
0.8 VS = 5V, 0V 0.7
CURRENT NOISE (pA/Hz)
0.6
VOLTAGE GAIN (dB)
VOLTAGE GAIN (dB)
0.5 0.4 VCM = 2.5V 0.3 0.2 0.1 0 1 10 100 FREQUENCY (Hz) 1000
LT1366 TPC13
VCM = 4V
CMRR vs Frequency (LT1366 and LT1367)
120
COMMON-MODE REJECTION RATIO (dB) POWER SUPPLY REJECTION RATIO (dB)
110 100 90 80 70 60 50 40 30 20 1k 10k 100k FREQUENCY (Hz)
100 80 POSITIVE SUPPLY 60 40 20 0
POWER SUPPLY REJECTION RATIO (dB)
VS = 2.5V
UW
5
LT1366 TPC10 LT1366 TPC16
Noise Voltage Spectrum
VS = 5V, 0V 60 50 40 VCM = 4V 30 20 10 0 VCM = 2.5V
VS = 2.5V VCM = 0V
TIME (1s/DIV)
LT1366 TPC11
1
10 100 FREQUENCY (Hz)
1000
LT1366 TPC12
Gain and Phase Shift vs Frequency (LT1366/LT1367)
70 60 50 40 30 20 10 0 GAIN PHASE VS = 2.5V 140 120 100 80 60 40 20 0
PHASE SHIFT (DEG)
Gain and Phase Shift vs Frequency (LT1368/LT1369)
50 40 30 20 10 0 -10 -20 - 30 - 40 - 50 1k 10k 100k 1M FREQUENCY (Hz) GAIN PHASE VS = 2.5V CL = 0.1F 140 120 100 80 60 40 20 0
PHASE SHIFT (DEG)
-10 -20 -30 1k 10k 100k 1M FREQUENCY (Hz)
-20 - 40 - 60 10M
LT1366 TPC14
-20 -40 -60 10M
LT1366 TPC15
PSRR vs Frequency (LT1366/LT1367)
120 VS = 2.5V 120 100 80
PSRR vs Frequency (LT1368/LT1369)
VS = 2.5V
POSITIVE SUPPLY 60 40 20 NEGATIVE SUPPLY 0 1k 10k 100k FREQUENCY (Hz) 1M
LT1366 TPC18
NEGATIVE SUPPLY
1M
1k
10k 100k FREQUENCY (Hz)
1M
LT1366 TPC17
9
LT1366/LT1367 LT1368/LT1369
TYPICAL PERFORMANCE CHARACTERISTICS
(The data presented here applies to the LT1366/LT1367/LT1368/LT1369 unless otherwise noted.) Gain-Bandwidth and Phase Margin vs Supply Voltage (LT1366/LT1367)
500 450 400
FREQUENCY (kHz)
GBW PHASE MARGIN
48
PHASE MARGIN (DEG)
CHANNEL SEPARATION (dB)
350 300 250 200 150 100 50 0 0 5
42 36 30 24 18 12 6
- 80 - 90 -100 -110 -120 -130 -140 -150 10 100 1k FREQUENCY (Hz) 10k
LT1366 TPC20
INPUT VOLTAGE (V)
15 20 10 SUPPLY VOLTAGE (V)
Capacitive Load Handling (LT1366/LT1367)
80 70 60
OVERSHOOT (%)
VS = 5V, 0V
50
OVERSHOOT (%)
OVERSHOOT (%)
50 40 30 20 10 0 10 100 1k 10k CAPACITIVE LOAD (pF) 100k
LT1366 TPC22
AV = 1 AV = 5
Slew Rate vs Supply Voltage
0.20 AV = -1
0.18
SLEW RATE (V/s)
CHANGE IN OFFSET VOLTAGE (V)
0.16
20 0 -20 -40 -60 -80 0 N8 PACKAGE VS = 15V
S8 PACKAGE VS = 2.5V
THD + NOISE (%)
0.14
0.12
0.10 0 4 8 12 16 20 24 28 32 TOTAL SUPPLY VOLTAGE (V) 36
10
UW
25
AV = 10
LT1366 TPC25
Channel Separation vs Frequency
60 54
- 50 - 60 - 70 VS = 15V VOUT = 1VP-P RL = 2k
Open-Loop Gain
20 15 10 5 0 RL = 10k -5 -10 -15 -20 5 -20 -15 -10 -5 0 10 OUTPUT VOLTAGE (V) 15 20 RL = 2k VS = 15V
LT1368/LT1369
LT1366/LT1367
0 30
LT1366 TPC19
LT1366 TPC21
Overshoot vs Load Current (LT1368/LT1369)
60 VS = 2.5V AV = 1 CL = 0.22F 40 30 20 10 0 -10 CL = 0.047F CL = 0.1F
40 30 20 10 60 50
Overshoot vs Load Current (LT1368/LT1369)
VS = 15V AV = 1 CL = 0.22F CL = 0.047F CL = 0.1F
-5 0 5 LOAD CURRENT (mA)
10
LT1366 TPC23
0 -10
-5 0 5 LOAD CURRENT (mA)
10
LT1366 TPC24
Warm-Up Drift vs Time
80 60 40 S8 PACKAGE VS = 15V
10
THD + Noise vs Peak-to-Peak Voltage
f = 1kHz RL = 10k (ALL CURVES) 1
0.1 VS = 1.5V AV = 1 0.01 VS = 1.5V AV = -1 VS = 2.5V AV = 1 VS = 2.5V AV = -1 4 5
N8 PACKAGE VS = 2.5V
15 30 45 60 75 90 105 120 135 150 TIME AFTER POWER-UP (SEC)
LT1366 TPC26
0.001 0 1 2 3 VIN(P-P) (V)
LT1366 TPC27
LT1366/LT1367 LT1368/LT1369
TYPICAL PERFORMANCE CHARACTERISTICS
(The data presented here applies to the LT1366/LT1367/LT1368/LT1369 unless otherwise noted.) Large-Signal Response (LT1366/LT1367) Small-Signal Response (LT1366/LT1367) THD + Noise vs Frequency
1 VS = 1.5V VIN = 2VP-P RL = 10k 5mV/DIV VS = 15V UNITY-GAIN 0.001 0.01 0.1 1 FREQUENCY (kHz) 10
LT1366 TPC28
THD + NOISE (%)
5V/DIV AV = 1 AV = -1
0.1
0.01 100s/DIV
LT1366 TPC29
APPLICATIONS INFORMATION
Rail-to-Rail Operation The LT1366 family differs from conventional op amps in the design of both the input and output stages. Figure 1 shows a simplified schematic of the amplifier. The input stage consists of two differential amplifiers, a PNP stage Q1/Q2 and an NPN stage Q3/Q4, which are active over
V+
I1
Q5
V- IN+ D1 IN - Q3 Q4 Q1 Q2 D2 Q7 Q8 Q12 V+ - 300mV Q6 D3 V- Q9 Q14 Q15 V+ CC
Figure 1. LT1366 Simplified Schematic Diagram
U
W
UW
0V
VS = 15V UNITY-GAIN
2s/DIV
LT1366 TPC30
U
U
different portions of the input common mode range. Lateral devices are used in both input stages, eliminating the need for clamps across the input pins. Each input stage is trimmed for offset voltage. A complementary output configuration (Q23 through Q26) is employed to create an output stage with rail-to-rail swing. The amplifier is fabri-
D4 Q10 Q11 V-
D5 Q17
D6 Q21
D7 Q24 Q23
Q16 V- V+ V+
V- C1 OUT
C2 V+
Q20 Q22
Q25 Q26 D8
Q13 D7
Q18
Q19
LT1366 FO1
11
LT1366/LT1367 LT1368/LT1369
APPLICATIONS INFORMATION
cated on Linear Technology's proprietary complementary bipolar process, which ensures very similar DC and AC characteristics for the output devices Q24 and Q26. A simple comparator Q5 steers current from current source I1 between the two input stages. When the input common mode voltage VCM is near the negative supply, Q5 is reverse biased, and I1 becomes the tail current for the PNP differential pair Q1/Q2. At the other extreme, when VCM is within about 1.3V from the positive supply, Q5 diverts I1 to the current mirror D3/Q6, which furnishes the tail current for the NPN differential pair Q3/Q4. The collector currents of the two input pairs are combined in the second stage, consisting of Q7 through Q11. Most of the voltage gain in the amplifier is contained in this stage. Differential amplifier Q14/Q15 buffers the output of the second stage, converting the output voltage to differential currents. The differential currents pass through current mirrors D4/Q17 and D5/Q16, and are converted to differential voltages by Q18 and Q19. These voltages are also buffered and applied to the output Darlington pairs Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local feedback loops around the output devices, lowering the output impedance at high frequencies. Input Offset Voltage Since the amplifier has two input stages, the input offset voltage changes depending upon which stage is active. The input offsets are random, but bounded voltages. When the amplifier switches between stages, offset voltages may go up, down, or remain flat; but will not exceed the guaranteed limits. This behavior is illustrated in three distribution plots of input offset voltage in the Typical Performance Characteristics section. Overdrive Protection Two circuits prevent the output from reversing polarity when the input voltage exceeds the common mode range. When the noninverting input exceeds the positive supply by approximately 300mV, the clamp transistor Q12 (Figure 1) turns on, pulling the output of the second stage low, which forces the output high. For inputs below the negative supply, diodes D1 and D2 turn on, overcoming the saturation of the input pair Q1/Q2. When overdriven, the amplifier draws input current that exceeds the normal input bias current. Figures 2 and 3 show some typical overdrive currents as a function of input voltage. The input current must be less than 1mA of positive overdrive or less than 7mA of negative overdrive, for the phase reversal protection to work properly. When the amplifier is severely overdriven, an external resistor should be used to limit the overdrive current. In addition to overdrive protection, the amplifier is protected against ESD strokes up to 4kV on all pins.
110 100
INPUT BIAS CURRENT (nA)
INPUT BIAS CURRENT (nA)
12
U
W
U
U
90 80 70 60 50 40 30 20 10 0 -500
MEASURED AS A FOLLOWER
+ -
T = 25C
T = 85C T = 70C
T = -55C
-300
-100 VS 100
300
500
COMMON MODE VOLTAGE RELATIVE TO POSITIVE SUPPLY (mV)
LT1366 F02
Figure 2. Input Bias Current vs Common Mode Voltage
0 -10 -20 -30 -40 -50 -60 -70 - 80 - 90 -100
MEASURED AS A FOLLOWER
+ -
T = - 55C T = 25C
T = 70C T = 85C
-110 -800
-600
- 400
-200
VS
200
COMMON MODE VOLTAGE RELATIVE TO NEGATIVE SUPPLY (mV)
LT1366 F03
Figure 3. Input Bias Current vs Common Mode Voltage
LT1366/LT1367 LT1368/LT1369
APPLICATIONS INFORMATION
Improved Supply Rejection in the LT1368/LT1369 The LT1368/LT1369 are variations of the LT1366/LT1367 offering greater supply rejection and lower high frequency output impedance. The LT1368/LT1369 require a 0.1F load capacitance for compensation. The output capacitance forms a filter, which reduces pickup from the supply and lowers the output impedance. This additional filtering is helpful in mixed analog/digital systems with common supplies, or systems employing switching supplies. Filtering also reduces high frequency noise, which may be beneficial when driving A/D converters. Figure 4 shows the outputs of the LT1366/LT1368 perturbed by a 200mVP-P 50kHz square wave added to the positive supply. The LT1368's power supply rejection is about ten times greater than that of the LT1366 at 50kHz. Note the 5-to-1 scale change in the output voltage traces. The tolerance of the external compensation capacitor is not critical. The plots of Overshoot vs Load Current in the Typical Performance Characteristics section illustrate the effect of a capacitive load.
100mV/DIV
100mV/DIV 20mV/DIV 2s/DIV
V+ (AC)
100mV/DIV
VOUT
LT1366 F04a
Figure 4a. LT1366 Power Supply Rejection Test
TYPICAL APPLICATIONS
Buffering A/D Converters Figure 5 shows the LT1368 driving an LTC (R)1288 2-channel micropower A/D Converter (ADC). The LTC1288 can accommodate voltage references and input signals equal to the supply rails. The sampling nature of this ADC eliminates the need for an external sample-and-hold, but may call for a drive amplifier because of the ADC's 12s settling requirement. The LT1368's rail-to-rail operation and low input offset voltage make it well-suited for low power, low frequency A/D applications. Either the LT1366 or LT1368 could be used for this application. However, for low frequencies (f < 1kHz) the LT1368 provides better supply rejection.
0.1F V0 VCC 1F
U
W
U
U
U
V+ (AC)
VOUT
2s/DIV
LT1366 F04b
Figure 4b. LT1368 Power Supply Rejection Test
+
1/2 LT1368
-
0.1F
CS/SHDN CH0
VCC (REF) CLK
TO P
LTC1288 CH1 V1 DOUT DIN
+
1/2 LT1368
GND
-
0.1F
LT1366 FO5
Figure 5. 2-Channel Low Power A/D Converter
13
LT1366/LT1367 LT1368/LT1369
TYPICAL APPLICATIONS
Precision Low Dropout Regulator Microprocessors and complex digital circuits frequently specify tight control of power supply characteristics. The circuit shown in Figure 6 provides a precise 3.6V, 1A output from a minimum 3.8V input voltage. The circuit's nominal operating voltage is 4.75V 5%. The voltage reference and resistor ratios determine output voltage accuracy, while the LT1366's high gain enforces 0.2% line and load regulation. Quiescent current is about 1mA and does not change appreciably with supply or load. All components are available in surface mount packages. The regulator's main loop consists of A1 and a logic level FET, Q1. The output is fed back to the op amp's positive input because of the phase inversion through Q1. The regulator's frequency response is limited by Q1's roll-off and the phase lead introduced by the output capacitor's effective series resistance (ESR). Two pole-zero networks compensate for these effects. The pole formed with R5 and C2 rolls off the gain set with the feedback network, while the pole formed with R7 and C3 rolls off A1's gain directly, which is the dominant influence on settling time. The zeros formed with R6 and C2, and R8 and C3 provide phase boost near the unity-gain crossover, which increases the regulator's phase margin. Although not directly part of the compensation, R9 decouples the op amp's output from Q1's large gate capacitance. A second loop provides a foldback current limit. A2 compares the sense voltage across R1 with 50mV referenced to the positive rail. When the sense voltage exceeds the reference, A2's output drives Q1's gate positive via A1. In current limit, the output voltage collapses and the current limit LED (D1) turns on causing about 30mV to drop across R3. A2 regulates Q1's drain current so that the deficit between the 50mV reference and the voltage across R3 is made up across the sense resistor. The reduced sense voltage is 20mV, which sets the current limit to about 400mA. As the supply voltage increases, the voltage across R3 increases, and the current limit folds back to a lower level. The current limit loop deactivates when the load current drops below the regulated output current. When the supply turns on rapidly, C1 bypasses the fold back circuit allowing the regulator to start-up into a heavy load. Q1 does not require a heat sink. When mounted on a type FR4 PC board, Q1 has a thermal resistance of 50C/W. At 1.4W worst case dissipation, Q1 can operate up to 80C.
10k R7 13k
C4 1F
LT1004-1.2
4.75V TO 3.6V LDO AT 1A *1% METAL FILM **SET RMIN BASED ON LOAD CHARACTERISTICS
14
U
VIN = 4.75V 5% R8 2k C3 6.8nF R1 0.05 R3 20 C1 10F + 50mV - R4 10k D1 R2 2k
+
C5 47F
0.1F
+
-
A1 1/2 LT1366
R9 100 Q1 Si9433DY 1.5k
-
A2 1/2 LT1366 D2 1N4148 5k
+
+
38.5k* C2 6.8nF R6 6.2k
VOUT = 3.6V AT 1A RMIN 1k
R5* 20k
+ **
Q2 2N3904 23.2k
CLOAD 10F
LT1366 F06
Figure 6. Precision 3.6V, 1A Low Dropout Regulator
LT1366/LT1367 LT1368/LT1369
TYPICAL APPLICATIONS
High-Side Current Source The wide-compliance current source shown in Figure 7 takes advantage of the LT1366's ability to measure small signals near the positive supply rail. The LT1366 adjusts Q1's gate voltage to force the voltage across the sense resistor (RSENSE) to equal the voltage from the supply to the potentiometer's wiper. A rail-to-rail op amp is needed because the voltage across the sense resistor must drop to zero when the divided reference voltage is set to zero. Q2 acts as a constant current sink to minimize error in the reference voltage when the supply voltage varies.
VCC RSENSE 0.2 1k 0.0033F 100 Q1 MTP23P06
LT1004-1.2
-
1/2 LT1366 RP 10k
+
ILOAD 40k 5V < VCC < 30V 0A < ILOAD < 1A AT VCC = 5V 0mA < ILOAD < 160mA AT VCC = 30V Q2 2N4340
Figure 7. High-Side Current Source
The circuit can operate over a wide supply range (5V < VCC < 30V). At low input voltage, circuit operation is limited by the MOSFET's gate drive requirements. At high
C1 10,000pF R1* 29.5k VIN C2 10,000pF
-
A1 1/4 LT1367
+
29.5k* 10k 3.3V 10k *1% RESISTORS
Figure 8. 4-Pole 1kHz, 3.3V Single Supply, State Variable Filter Using the LT1367
U
input voltage, circuit operation is limited by the LT1366's absolute maximum ratings and the output power requirements. The circuit delivers 1A at 200mV of sense voltage. With a 5V input supply, the power dissipation is 5W. For operation at 70C ambient temperature, the MOSFET's heat sink must have a thermal resistance of: HS = JA SYSTEM - JC FET = (125C - 70C)/5W - 1.25C/W = 11C/W -1.25C/W = 9.75C/W which is easily achievable with a small heat sink. Input voltages greater than 5V require the use of a larger heat sink or a reduction of the output current. The circuit's supply regulation is about 0.03%/V. The output impedance is equal to the MOSFET's output impedance multiplied by the op amp's open-loop gain. Degradations in current-source compliance occur when the voltage across the MOSFET's on-resistance and the sense resistor drops below the voltage required to maintain the desired output current. This condition occurs when [VCC - VOUT] < [ILOAD * (RSENSE + RON)]. Single Supply, 1kHz, 4th Order Butterworth Filter An LT1367 is used in Figure 8 to form a 4th order Butterworth filter. The filter is a simplified state variable architecture consisting of two cascaded 2nd order sections. Each section uses the 360 degree phase shift around
LT1366 F07
10,000pF R2* 8.6k
-
10,000pF 11.8k*
A2 1/4 LT1367
-
+
A3 1/4 LT1367
21.5k*
-
+
11.8k* 1F
A4 1/4 LT1367
VOUT
+
LT1366 F08
15
LT1366/LT1367 LT1368/LT1369
TYPICAL APPLICATIONS
the 2 op amp loop to create a negative summing junction at A1's positive input1. The circuit has low sensitivities for center frequency and Q, which are set with the following equations: 02 = 1/(R1 * C1 * R2 * C2) where, R1 = 1/(0 * Q * C1) and R2 = Q/(0 * C2). The DC bias applied to A2 and A4, half supply, is not needed when split supplies are available. The circuit swings rail-to-rail in the passband making it an excellent anti-aliasing filter for ADCs. The amplitude response is flat to 1kHz then rolls off at 80dB/decade.
1James Hahn, "State Variable Filter Trims Predecessor's Component Count," Electronics, April
21, 1982.
0
GAIN
PHASE
-20
GAIN (dB)
-40
-60
-80 100 1k FREQUENCY (Hz)
Figure 9. Frequency Response of 4th Order Butterworth Filter
16
U
10k V+ 2
-
1/2 LT1366 1 VOUT
VIN
3
+
SIGNAL AMP
1M
+
7 22pF 1/2 LT1366
5 CANCELLATION AMP 6
-
1M
1366 F10
Figure 10. Input Bias Current Cancellation
180 144 108 72
PHASE (DEG)
VCC
36 0 -36 -72 -108 -144 -180 10k
1366 F09
RP 10k
+
1/2 LT1366
-
RL
1366 F11
Figure 11. Rail-to-Rail Potentiometer Buffer
LT1366/LT1367 LT1368/LT1369
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package 8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400* (10.160) MAX 8 7 6 5
0.255 0.015* (6.477 0.381)
1 0.300 - 0.325 (7.620 - 8.255)
2
3
4 0.130 0.005 (3.302 0.127)
0.045 - 0.065 (1.143 - 1.651)
0.009 - 0.015 (0.229 - 0.381)
0.065 (1.651) TYP 0.125 (3.175) 0.020 MIN (0.508) MIN 0.018 0.003 (0.457 0.076) N8 1197
(
+0.035 0.325 -0.015 8.255 +0.889 -0.381
)
0.100 0.010 (2.540 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
17
LT1366/LT1367 LT1368/LT1369
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP 0.053 - 0.069 (1.346 - 1.752)
2
3
4
0.004 - 0.010 (0.101 - 0.254)
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 0996
18
LT1366/LT1367 LT1368/LT1369
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0 - 8 TYP
0.016 - 0.050 0.406 - 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
S Package 14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 - 0.344* (8.560 - 8.738) 14 13 12 11 10 9 8
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.053 - 0.069 (1.346 - 1.752)
2
3
4
5
6
7
0.004 - 0.010 (0.101 - 0.254)
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
S14 0695
19
LT1366/LT1367 LT1368/LT1369
TYPICAL APPLICATION
Instrumentation Amplifier
V+ 0.1F
GUARD
+
200 1/4 LT1367 A1B 10M
INPUTS
-
10M GUARD
22pF RF 102k
R GAIN = 10 1 + F = 100 RG BW = 30kHz
()
-
+
1/4 LT1367 A1D
RELATED PARTS
PART LT1078/LT1079 LTC1152 DESCRIPTION Dual/Quad 55A Max, Single Supply, Precision Op Amps Rail-to-Rail Input, Rail-to-Rail Output, Zero-Drift Amplifier COMMENTS Input/Output Common Mode Includes Ground, 70V VOS(MAX) and 2.5V/C Drift (Max), 200kHz GBW, 0.07V/s Slew Rate High DC Accuracy, 10V VOS(MAX), 100nV/C Drift, 1MHz GBW, 1V/s Slew Rate, Supply Current 2.2mA (Max), Single Supply, Can Be Configured for C-LoadTM Operation Input/Output Common Mode Includes Ground, 70V VOS(MAX) and 4V/C Drift (Max), 85kHz GBW, 0.04V/s Slew Rate Input Common Mode Includes Ground, 275V VOS(MAX) and 6V/C Drift (Max), Supply Current 1.8mA per Op Amp (Max) 375V VOS(MAX), 2V/C Drift (Max), "Over-the-Top" Input
LT1178/LT1179 LT1211/LT1212 LT1495/LT1496
Dual/Quad 17A Max, Single Supply, Precision Op Amps Dual/Quad 14MHz, 7V/s, Single Supply, Precision Op Amps 1.5A, Rail-to-Rail Input/Output Dual/Quad
C-Load is a trademark of Linear Technology Corporation
20
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417 q (408) 432-1900 FAX: (408) 434-0507q TELEX: 499-3977 q www.linear-tech.com
-
+
U
+
10M
-
1/4 LT1367 A1A
10k RF 102k RG 11.3k
100k
+ -
1/4 LT1367 A1C
OUTPUT
RG 11.3k
10k
100k
1366 TA03
1366fa LT/TP 0298 REV A 2K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 1995

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